Negative Capacitance for Stabilizing the Logic State in a Tunnel Field-Effect Transistor-Reference-Cited by-同舟云学术

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Negative Capacitance for Stabilizing the Logic State in a Tunnel Field-Effect Transistor

Published:2024-04-02 Issue: Volume: Page:
ISSN:2574-0970
Container-title:ACS Applied Nano Materials
language:en
Short-container-title:ACS Appl. Nano Mater.

Author:

Dey Koushik¹,Das Bikash¹^ORCID,Hazra Pabitra Kumar¹,Kundu Tanima¹^ORCID,Naskar Sanjib²,Das Soumik¹,Maity Sujan¹,Maji Poulomi¹,Karmakar Bipul¹,Paramanik Rahul¹,Datta Subhadeep¹^ORCID

Affiliation:

1. School of Physical Sciences, Indian Association for the Cultivation of Science (IACS), 2A & B Raja S. C. Mullick Road, Jadavpur, Kolkata 700032, India

2. Central Scientific Services (CSS), Indian Association for the Cultivation of Science (IACS), 2A & B Raja S. C. Mullick Road, Jadavpur, Kolkata 700032, India

Funder

Science and Engineering Research Board

Publisher

American Chemical Society (ACS)

Link

https://pubs.acs.org/doi/pdf/10.1021/acsanm.3c06311

Reference44 articles.

1. Direct and Indirect Band-to-Band Tunneling in Germanium-Based TFETs

2. Ferroelectric gate tunnel field-effect transistors with low-power steep turn-on

3. Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

4. Double-Gate Negative-Capacitance MOSFET With PZT Gate-Stack on Ultra Thin Body SOI: An Experimentally Calibrated Simulation Study of Device Performance

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