Vertically Integrated Multiple Nanowire Field Effect Transistor-Reference-Cited by-同舟云学术

Vertically Integrated Multiple Nanowire Field Effect Transistor

Published:2015-11-11 Issue:12 Volume:15 Page:8056-8061
ISSN:1530-6984
Container-title:Nano Letters
language:en
Short-container-title:Nano Lett.

Author:

Lee Byung-Hyun¹²,Kang Min-Ho³,Ahn Dae-Chul¹,Park Jun-Young¹,Bang Tewook¹,Jeon Seung-Bae¹,Hur Jae¹,Lee Dongil¹,Choi Yang-Kyu¹

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea

2. Department of Memory Business, Samsung Electronics, San #16 Banwol-Dong, Hwasung-City, Gyeonggi-Do 445-701, Republic of Korea

3. Department of Nano-process, National Nanofab Center (NNFC), 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea

Funder

National Research Foundation of Korea

Publisher

American Chemical Society (ACS)

Subject

Mechanical Engineering,Condensed Matter Physics,General Materials Science,General Chemistry,Bioengineering

Link

https://pubs.acs.org/doi/pdf/10.1021/acs.nanolett.5b03460

Reference36 articles.

1. Scaling of Trigate nanowire (NW) MOSFETs to sub-7nm width: 300K transition to Single Electron Transistor

2. Device scaling limits of Si MOSFETs and their application dependencies

3. Improved Short Channel Effect Control in Bulk FinFETs With Vertical Implantation to Form Self-Aligned Halo and Punch-Through Stop Pocket

4. 2D Semiconductor FETs—Projections and Design for Sub-10 nm VLSI

5. Nanometre-scale electronics with III–V compound semiconductors

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