Vertical III–V Nanowire Device Integration on Si(100)-Reference-Cited by-同舟云学术

Vertical III–V Nanowire Device Integration on Si(100)

Published:2014-03-19 Issue:4 Volume:14 Page:1914-1920
ISSN:1530-6984
Container-title:Nano Letters
language:en
Short-container-title:Nano Lett.

Author:

Borg Mattias¹,Schmid Heinz¹,Moselund Kirsten E.¹,Signorello Giorgio¹,Gignac Lynne²,Bruley John²,Breslin Chris²,Das Kanungo Pratyush¹,Werner Peter³,Riel Heike¹

Affiliation:

1. IBM Research-Zurich, Säumerstrasse 4, 8803, Rüschlikon, Switzerland

2. IBM Thomas J. Watson Research Center, 1101 Kitchawan Road, Yorktown Heights, New York 10598, United States

3. Max Planck Institute of Microstructure Physics, Weinberg 2, 06120 Halle, Germany

Publisher

American Chemical Society (ACS)

Subject

Mechanical Engineering,Condensed Matter Physics,General Materials Science,General Chemistry,Bioengineering

Link

https://pubs.acs.org/doi/pdf/10.1021/nl404743j

Reference48 articles.

1. Wafer-scale integration of group III–V lasers on silicon using transfer printing of epitaxial layers

2. Nanometre-scale electronics with III–V compound semiconductors

3. 30-nm InAs Pseudomorphic HEMTs on an InP Substrate With a Current-Gain Cutoff Frequency of 628 GHz

4. Egard, M.; Ohlsson, L.; Borg, B. M.; Lenrick, F.; Wallenberg, R.; Wernersson, L.E.; Lind, E.InElectron Devices Meeting (IEDM), 2011:IEEE International:Washington, DC, 2011; pp13.2.1–13.2.4.

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