Temperature Dependence According to Grain Boundary Potential Barrier Variation in Vertical NAND Flash Cell with Polycrystalline-Silicon Channel
Author:
Affiliation:
1. Department of Electronic Engineering, Hanyang University, Seoul 133-791, Korea
2. Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul 133-791, Korea
3. SK hynix Inc., Gyeonggi, Icheon 467-701, Korea
Publisher
American Scientific Publishers
Subject
Condensed Matter Physics,General Materials Science,Biomedical Engineering,General Chemistry,Bioengineering
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Low temperature (<150 °C) annealed amorphous indium-gallium-tin oxide (IGTO) thin-film for flash memory application;Applied Surface Science;2022-12
2. C-axis aligned crystalline indium-gallium-zinc oxide (CAAC-IGZO) and high-k charge trapping film for flash memory application;Journal of Alloys and Compounds;2021-12
3. Device Characterization of Nanoscale Vertical-Channel Transistors Implemented with a Mesa-Shaped SiO2 Spacer and an In–Ga–Zn–O Active Channel;ACS Applied Electronic Materials;2021-08-31
4. Comparative studies on vertical-channel charge-trap memory thin-film transistors using In-Ga-Zn-O active channels deposited by sputtering and atomic layer depositions;Nanotechnology;2020-08-04
5. Analysis and Optimization of Threshold Voltage Variability by Polysilicon Grain Size Simulation in 3D NAND Flash Memory;IEEE Journal of the Electron Devices Society;2020
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