Enhancement of the Retention Characteristics in Solution-Processed Ferroelectric Memory Transistor with Dual-Gate Structure

Author:

Boampong Amos Amoako1,Cho Jae-Hyeok2,Choi Yoonseuk1,Kim Min-Hoi2

Affiliation:

1. Department of Electronic Engineering, Hanbat National University, Daejeon, 34158, Republic of Korea

2. Department of Creative Convergence Engineering, Hanbat National University, Daejeon, 34158, Republic of Korea

Abstract

We demonstrated the enhancement of the retention characteristics in solution-processed ferroelectric memory transistors. For enhanced retention characteristics, solution-processed Indium Gallium Zinc Oxide (InGaZnO) semiconductor is used as an active layer in a dual-gate structure to achieve high memory on-current and low memory off-current respectively. In our dual-gate oxide ferroelectric thin-film transistor (DG Ox-FeTFT), while conventional TFT characteristic is observed during bottom-gate sweeping, large hysteresis is exhibited during top-gate sweeping with high memory on-current due to the high mobility of the InGaZnO. The voltage applied to the counter bottom-gate electrode causes variations in the turn-on voltage position, which controlled the memory on- and off-current in retention characteristics. Specifically, due to the full depletion of semiconductor by the high negative counter gate bias, the memory off-current in reading operation is dramatically reduced by 104. The application of a high negative counter field to the dual-gate solution-processed ferroelectric memory gives a high memory on- and off-current ratio useful for the production of high performance multi-bit memory devices.

Publisher

American Scientific Publishers

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,General Chemistry,Bioengineering

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