Potential Applications of Poly-Silicon as an Electronic-Device Material

Abstract

ABSTRACTPoly-crystalline silicon can be regarded as a true electronic material if good p-n junctions can be made in it or if its state of depletion can be altered by reasonable gate voltages. The degree of perfection with which it must exhibit these electronic-material properties depends on whether the application is as a technology in VLSI (or other bulk-Si substrate use) where devices with bulk-crystalline properties are available or as the principal active material in Large Area Integration (LAI), such as flat-panel display addressing circuits, where the competition is much less demanding. The three main detrimental effects of grain boundaries on electronic-device function are the action of grain boundary traps as (1) extra charge centers, (2) lifetime killers, and (3) mobility-reducing scattering centers. The current trend in reducing or almost eliminating grain boundaries by laser recrystallization or lateral epitaxy has the effect of reducing the average number of traps. In terms of potential applications of the material, the improvement derived from these procedures must be balanced against other contraints placed on the overall structure. For example, the thickness and quality of the lower oxide (and interface) in these processes will determine whether an electronically active lower gate function is practical. Some currently envisioned applications include load devices in inverters either as resistors or as depletion transistors, common-gate staked CMOS structures, dual-channel MOSFET's, and other “vertical VLSI” applications. The systems-level topological advantages of stacked structures and the circuit-performance improvement provided by the ground plane in dielectrically isolated devices must also be balanced against the extra cost and yield loss of additional masking level complexity and design complication.