Low Temperature Device Processing Technology for II-VI Semiconductors

Abstract

ABSTRACTLow temperature (<60° C) processing technologies that avoid potentially damaging processing steps have been developed for devices fabricated from II-VI semiconductor epitaxial layers grown by photoassisted molecular beam epitaxy (MBE). These low temperature technologies include: 1) photolithography (1 µm geometries), 2) calibrated etchants (rates as low as 30 Å/s), 3) a metallization lift-off process employing a photoresist profiler, 4) an interlevel metal dielectric, and 5) an insulator technology for metal-insulator-semiconductor (MIS) structures. A number of first demonstration devices including field-effect transistors and p-n junctions have been fabricated from II-VI epitaxial layers grown by photoassisted MBE and processed using the technology described here. In this paper, two advanced device structures, processed at <60° C, will be presented: 1) CdTe:As-CdTe:In p-n junction detectors, grown in situ by photoassisted MBE, and 2) HgCdTe-HgTe-CdZnTe quantum-well modulation-doped field-effect transistors (MODFETs).