Reliability physics of ferroelectric/negative capacitance transistors for memory/logic applications: An integrative perspective
Author:
Publisher
Springer Science and Business Media LLC
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
Link
https://link.springer.com/content/pdf/10.1557/s43578-021-00420-1.pdf
Reference72 articles.
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2. S. Salahuddin, S. Datta, Use of negative capacitance to provide voltage amplification for low power nanoscale devices. Nano Lett. 8(2), 405–410 (2008). https://doi.org/10.1021/nl071804g
3. J.L. Moll, Y. Tarui, A new solid state memory resistor. IEEE Trans. Electron Device 10(5), 338 (1963). https://doi.org/10.1109/T-ED.1963.15245
4. G.A. Salvatore, D. Bouvet, A.M. Ionescu, Demonstration of subthrehold swing smaller than 60mV/decade in Fe-FET with P(VDF-TrFE)/SiO2 gate stack. in IEEE International Electron Devices Meeting (IEDM), 2008, pp. 4–7. https://doi.org/10.1109/IEDM.2008.4796642
5. N. Gong, T.P. Ma, Why is FE-HfO2 more suitable than PZT or SBT for scaled nonvolatile 1-T memory cell? A retention perspective. IEEE Electron Device Lett. 37(9), 1123–1126 (2016). https://doi.org/10.1109/LED.2016.2593627
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