Author:
Athena Fabia Farlin,Fagbohungbe Omobayode,Gong Nanbo,Rasch Malte J.,Penaloza Jimmy,Seo SoonCheon,Gasasira Arthur,Solomon Paul,Bragaglia Valeria,Consiglio Steven,Higuchi Hisashi,Park Chanro,Brew Kevin,Jamison Paul,Catano Christopher,Saraf Iqbal,Silvestre Claire,Liu Xuefeng,Khan Babar,Jain Nikhil,McDermott Steven,Johnson Rick,Estrada-Raygoza I.,Li Juntao,Gokmen Tayfun,Li Ning,Pujari Ruturaj,Carta Fabio,Miyazoe Hiroyuki,Frank Martin M.,La Porta Antonio,Koty Devi,Yang Qingyun,Clark Robert D.,Tapily Kandabara,Wajda Cory,Mosden Aelan,Shearer Jeff,Metz Andrew,Teehan Sean,Saulnier Nicole,Offrein Bert,Tsunomura Takaaki,Leusink Gert,Narayanan Vijay,Ando Takashi
Abstract
Analog memory presents a promising solution in the face of the growing demand for energy-efficient artificial intelligence (AI) at the edge. In this study, we demonstrate efficient deep neural network transfer learning utilizing hardware and algorithm co-optimization in an analog resistive random-access memory (ReRAM) array. For the first time, we illustrate that in open-loop deep neural network (DNN) transfer learning for image classification tasks, convergence rates can be accelerated by approximately 3.5 times through the utilization of co-optimized analog ReRAM hardware and the hardware-aware Tiki-Taka v2 (TTv2) algorithm. A simulation based on statistical 14 nm CMOS ReRAM array data provides insights into the performance of transfer learning on larger network workloads, exhibiting notable improvement over conventional training with random initialization. This study shows that analog DNN transfer learning using an optimized ReRAM array can achieve faster convergence with a smaller dataset compared to training from scratch, thus augmenting AI capability at the edge.