Machine Learning Algorithm for Efficient Design of Separated Buffer Super-Junction IGBT
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Published:2023-01-28
Issue:2
Volume:14
Page:334
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ISSN:2072-666X
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Container-title:Micromachines
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language:en
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Short-container-title:Micromachines
Author:
Kim Ki Yeong1ORCID, Hwang Tae Hyun1ORCID, Song Young Suh2ORCID, Kim Hyunwoo3, Kim Jang Hyun1ORCID
Affiliation:
1. Department of Electrical Engineering, Pukyong National University, Busan 48513, Republic of Korea 2. Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Republic of Korea 3. School of Electronic and Electrical Engineering, Hankyong National University, Anseong 17579, Republic of Korea
Abstract
An improved structure for an Insulated Gate Bipolar Transistor (IGBT) with a separated buffer layer is presented in order to improve the trade-off between the turn-off loss (Eoff) and on-state voltage (Von). However, it is difficult to set efficient parameters due to the increase in the new buffer doping concentration variable. Therefore, a machine learning (ML) algorithm is proposed as a solution. Compared to the conventional Technology Computer-Aided Design (TCAD) simulation tool, it is demonstrated that incorporating the ML algorithm into the device analysis could make it possible to achieve high accuracy and significantly shorten the simulation time. Specifically, utilizing the ML algorithm could achieve coefficients of determination (R2) of Von and Eoff of 0.995 and 0.968, respectively. In addition, it enables the optimized design to fit the target characteristics. In this study, the structure proposed for the trade-off improvement was targeted to obtain the minimum Eoff at the same Von, especially by adjusting the concentration of the separated buffer. We could improve Eoff by 36.2% by optimizing the structure, which was expected to be improved by 24.7% using the ML approach. In another way, it is possible to inversely design four types of structures with characteristics close to the target characteristics (Eoff = 1.64 μJ, Von = 1.38 V). The proposed method of incorporating machine learning into device analysis is expected to be very strategic, especially for power electronics analysis (where the transistor size is comparatively large and requires significant computation). In summary, we improved the trade-off using a separated buffer, and ML enabled optimization and a more precise design, as well as reverse engineering.
Funder
Hankyong National University
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
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