Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

Author:

Yang Han,Chen Rui,Han Jianwei,Liang Yanan,Ma Yingqi,Wu Hao

Abstract

Thermal Laser Stimulation (TLS) is an efficient technology for integrated circuit defect localization in Failure Analysis (FA) laboratories. It contains Optical Beam-Induced Resistance Change (OBIRCH), Thermally-Induced Voltage Alteration (TIVA), and Seebeck Effect Imaging (SEI). These techniques respectively use the principle of laser-induced resistance change and the Seebeck effect. In this paper, a comprehensive model of TLS technology is proposed. Firstly, the model presents an analytical expression of the temperature variation in Integrated Circuits (IC) after laser irradiation, which quantificationally shows the positive correlation with laser power and the negative correlation with scanning velocity. Secondly, the model describes the opposite influence of laser-induced resistance change and the Seebeck effect in the device. Finally, the relationship between the current variation measured in the experiment and other parameters, especially the voltage bias, is well explained by the model. The comprehensive model provides theoretical guidance for the efficient and accurate defect localization of TLS technology.

Publisher

MDPI AG

Subject

Fluid Flow and Transfer Processes,Computer Science Applications,Process Chemistry and Technology,General Engineering,Instrumentation,General Materials Science

Reference18 articles.

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Preliminary Study on Automatic Detection of Hard Defects in Integrated Circuits Based on Thermal Laser Stimulation;Photonics;2023-05-06

2. Design of Integrated Circuit Hard Defect Location System Based on Thermal Laser Stimulation;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11

3. Dynamic EFI and circuit analysis case studies on integrated circuit buried via void defects;Microelectronics Reliability;2022-08

4. Significance of Dynamic Electrical Fault Isolation Techniques on buried Via Void defects;2021 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA);2021-09-15

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