Chip Appearance Inspection Method for High-Precision SMT Equipment

Abstract

In order to meet the defect-detection requirements of chips in high-precision surface mount technology (SMT) equipment widely used in the electronic industry, a chip appearance defect-detection method based on multi-order fractional discrete wavelet packet decomposition (DWPD) is proposed in this paper. First, lead and body regions were extracted from chip images using the image segmentation algorithm with asymmetric Laplace mixture model and connected-component labelling algorithm; then, the texture feature of the region to be inspected was extracted with the multi-order fractional DWPD algorithm and the geometric and gradient features were combined to form image features of the region to be inspected before the subset of features was selected from image features with the feature selection algorithm based on the variational Bayesian Gaussian mixture model; and finally, the support vector machine was used to determine whether the region to be inspected was defective. An experiment was conducted on a data set captured in high-precision SMT equipment. The accuracy of the proposed chip appearance defect-detection method is about 93%, which is more accurate than existing ones.