Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory
Author:
Affiliation:
1. Department of Electrical Engineering, Pohang University of Science and Technology, Pohang 37673, Republic of Korea
2. Department of Electrical Engineering, Gyeongsang National University, Jinju 52828, Republic of Korea
Abstract
Funder
National Research Foundation
Samsung Electronics
Publisher
MDPI AG
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
Link
https://www.mdpi.com/2072-666X/14/11/2007/pdf
Reference28 articles.
1. Ishimaru, K. (2019, January 7–11). Future of non-volatile memory-from storage to computing. Proceedings of the 2019 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA.
2. Heineck, L., and Liu, J. (2022, January 15–18). 3D NAND Flash Status and Trends. Proceedings of the 2022 IEEE International Memory Workshop (IMW), Dresden, Germany.
3. Choe, J. (2021, January 27–29). Memory Technology 2021: Trends & Challenges. Proceedings of the 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Dallas, TX, USA.
4. Shirota, R. (2019). Advances in Non-Volatile Memory and Storage Technology, Woodhead Publishing.
5. Seo, J.Y., Kim, Y., Park, S.H., Kim, W., Kim, D.-B., Lee, J.-H., Shin, H., and Park, B.-G. (2012, January 10–11). Investigation into the effect of the variation of gate dimensions on program characteristics in 3D NAND flash array. Proceedings of the 2012 IEEE Silicon Nanoelectronics Workshop (SNW), Honolulu, HI, USA.
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