Author:
Zubert Mariusz,Kulesza Zbigniew,Jankowski Mariusz,Napieralski Andrzej
Abstract
This paper presents the methodology of material parameters’ estimation for the dual-phase-lag (DPL) model at the nanoscale in modern integration circuit (IC) structures. The analyses and measurements performed were used in the unique dedicated micro-electro-mechanical system (MEMS) test structure. The electric and thermal domain of this structure was analysed. Finally, the silicon dioxide (SiO2) temperature time-lag estimation procedure is presented based on the scattering parameters measured by a vector network analyser for the considered MEMS structure together with the 2-omega method. The proposed methodology has the ability to estimate the time-lag parameter with high accuracy and is also suitable for the temperature time-lag estimation for other manufacturing process technologies of ICs and other insulation materials used for integrated circuits such as silicon nitride (Si3N4), titanium nitride (TiN), and hafnium dioxide (HfO2).
Funder
National Science Centre in Poland
Subject
Energy (miscellaneous),Energy Engineering and Power Technology,Renewable Energy, Sustainability and the Environment,Electrical and Electronic Engineering,Control and Optimization,Engineering (miscellaneous)
Cited by
1 articles.
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1. Comparison of Different Formulations for The Dual-Phase-Lag Heat Conduction Model;2022 28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC);2022-09-28