Author:
Barile ,Stornelli ,Ferri ,Safari ,D’Amico
Abstract
In this paper, a novel low voltage low power CMOS second generation voltage conveyor (VCII) with an improved voltage range at both the X and Z terminals is presented. The proposed VCII is formed by a current buffer based on a class AB regulated common-gate stage and a modified rail-to-rail voltage buffer. Spice simulation results using LFoundry 0.15 μm low-Vth CMOS technology with a ±0.9 V supply voltage are provided to demonstrate the validity of the designed circuit. Thanks to the class AB behavior, from a bias current of 10 µA, the proposed VCII is capable of driving 0.5 mA on the X terminal, with a total power consumption of 120 µW. The allowed voltage swing on the Z terminal is at least equal to ±0.83 V, while on the X terminals it is ±0.72 V. Both DC and AC voltage and current gains are provided, and time domain simulations, where the voltage conveyor is used as a transimpedance amplifier (TIA), are also presented. A final table that summarizes the main features of the circuit, comparing them with the literature, is also given.
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
Cited by
13 articles.
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