A New Low-Voltage Second Generation Voltage Conveyor Using Merged Voltage Follower and DTMOS Techniques

Abstract

A very simple, compact and low-power second generation voltage conveyor circuit using only eight transistors is proposed in this work. Voltage follower stage is implemented using merged voltage follower (MVF), offering very low output impedance. A simple current mirror forms the input stage of the proposed voltage conveyor. To further enhance the linearity, another circuit is proposed where input transistor in MVF is replaced with DTMOS (Dynamic Threshold Voltage MOSFET), giving [Formula: see text][Formula: see text]mV linearity range as compared to [Formula: see text][Formula: see text]mV of the first proposal. Proposed-II VCII provides reduced offset voltage due to decreased effective threshold of DTMOS, and gain bandwidth product of the circuit also improves. Simulation results are computed using 180-nmCMOS technology with supply voltage of [Formula: see text][Formula: see text]V to validate the proposed circuits. Proposed-I and proposed-II VCII consume 85.1[Formula: see text][Formula: see text]W and 97.5[Formula: see text][Formula: see text]W, respectively. An application of the proposed conveyors as “current to voltage converter”, is also presented.