Abstract
An analytical method to design a power amplifier (PA) with an optimized power added efficiency (PAE) trajectory for envelope tracking (ET) architecture is proposed. To obtain feasible matching solutions for high-efficiency performance of the PA in the dynamic supply operation, hybrid continuous modes (HCM) architecture is introduced. The design space for load impedances of the HCM PAs with nonlinear capacitance is deduced mathematically using the device’s embedding transfer network, without the necessity of using load-pull. The proposed design strategy is verified with the implementation of a GaN PA operating over the frequency range of 1.9 GHz to 2.2 GHz with PAE between 67.8% and 72.4% in the 6.7 dB back-off power region of the ET mode. The ET experimental system was set up to evaluate the application of the PA circuit. Measurement results show that the ET PA at 2.1 GHz reaches the efficiency of 61%, 54%, 44% and an error vector magnitude (EVM) of 0.32%, 0.60%, 0.67% at an average output power of 34.4 dBm, 34.2 dBm, 34.1 dBm for 6.7 dB peak-to-average power ratios (PAPR) signals with 5 MHz, 10 MHz, and 20 MHz bandwidths, respectively. Additionally, tested by a 20 MHz bandwidth 16 quadrature amplitude modulation (QAM) signal, 41.8% to 49.2% efficiency of ET PA is achieved at an average output power of 33.5 dBm to 35.1 dBm from 1.9 GHz to 2.2 GHz.
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering