Affiliation:
1. School of Electronic Science and Engineering, Xiamen University, Xiamen 361005, China
2. School of Intergated Circuits, Tsinghua University, Beijing 100084, China
Abstract
Recently, design methods based on gm/Id parameters have attracted attention in analog integrated circuit design and have been automated with computer assistance. However, the look-up tables (LUTs) in the gm/Id method have the problem of high hardware resource overhead. To address this issue, this paper proposes a multi-output deep neural network (DNN) structure for modeling the direct-current parameters of transistors and replacing LUTs for circuit design. The proposed DNN models’ performance is verified using mainstream design technologies such as TSMC 40 nm (T40), TSMC 65 nm (T65), TSMC 180 nm (T180), and SMIC 180 nm (S180). Compared with LUTs, the proposed DNN models are able to reduce at least 99.9% storage space occupation and 95.62% prediction time overhead with a mean absolute percentage error of less than 0.2%. In addition, we propose an automated circuit migration design method using DNN models in different technologies, combined with gm/Id parameters. The method generates circuit design databases in different technologies and obtains device design results according to performance requirements. The experimental results show that using DNN models can reduce the time overhead by more than 40% compared to using LUTs. The simulation results of circuit transplantation design show that the circuit performance of T40, T65, S180, and T180 meets the requirements, which verifies the proposed DNN-based automated circuit design method.
Funder
National Key Research and Development Project
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
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