Instability in In0.7Ga0.3As Quantum-Well MOSFETs with Single-Layer Al2O3 and Bi-Layer Al2O3/HfO2 Gate Stacks Caused by Charge Trapping under Positive Bias Temperature (PBT) Stress

Author:

Kwon Hyuk-Min,Kim Dae-Hyun,Kim Tae-WooORCID

Abstract

The instability of transistor characteristics caused by charge trapping under positive bias temperature (PBT) stress in In0.7Ga0.3As metal oxide semiconductor field-effect transistors (MOSFETs) with single-layer Al2O3 and bi-layer Al2O3/HfO2 gate stacks was investigated. The equivalent field across the multi-gate stacks was compared with a single layer used to compare the instability of electrical characteristics. The observed threshold voltage degradation (ΔVT) was consistent with the phenomenon of fast transient trapping of injected electrons at pre-existing shallow defects in the high-κ dielectric of HfO2, in which this charging was recovered by applying a relaxation voltage. Excluding the fast-transient charging components, the power law exponent (n), with respect to the time-dependent threshold voltage degradation, ranged from 0.3 to 0.35 for both single-layer Al2O3 and bi-layer Al2O3/HfO2 gate stacks. This long-term (slow) VT shift, which was strongly correlated with transconductance (Gm) degradation, was attributed to significant charge trapping in the border trap or/and defect sites within the high-κ dielectric.

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

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