Design of a 1.2 kV SiC MOSFET with Buried Oxide for Improving Switching Characteristics

Abstract

The 1.2 kV SiC MOSFET with a buried oxide was verified to be effective in improving switching characteristics. It is crucial to reduce the gate–drain charge (QGD) of devices to minimize switching loss (Etotal). The SiC MOSFET with a split gate and device with a buffered oxide have been proposed by previous studies to reduce the QGD of the devices. However, both devices have a common issue of the concentration of the electric field at the gate oxide. In this paper, we propose the 1.2 kV SiC MOSFET with a buried oxide to reduce the QGD and suppress the electric field crowding effect at the gate oxide. We analyzed the specific on-resistance (Ron,sp), QGD and the maximum electric field at the gate oxide in the off state (Eox,max) according to the width (WBO) and thickness of the buried oxides (TBO). The device with the buried oxide, under optimal conditions, showed lower Eox,max and Etotal without significant increase in Ron,sp in comparison to the device with a conventional structure. These results indicate that the buried oxide can improve the switching characteristics of 1.2 kV SiC MOSFETs.