A Novel Word Line Driver Circuit for Compute-in-Memory Based on the Floating Gate Devices

Author:

Gu Xiaofeng1ORCID,Che Rao1,Dong Yating1,Yu Zhiguo1

Affiliation:

1. Engineering Research Center of Internet of Things Technology Applications (Ministry of Education), Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China

Abstract

In floating gate compute-in-memory (CIM) chips, due to the gate equivalent capacitance of the large-scale array and the parasitic capacitance of the long-distance transmission wire, it is difficult to balance the switching speed and area of the word line driver circuit (WLDC). The difference among multiple voltage domains required for floating gate CIM devices has also far exceeded the withstand voltage range of a single transistor in the WLDC. This paper proposes a novel WLDC based on the working principle of the CIM array. A multi-level pre-processing voltage control method is adopted to carry out an optional hierarchical transmission of multiple high voltages, significantly reducing the propagation delay. The proposed WLDC is based on the Wilson current mirror structure, which substantially reduces the physical design area. The simulation results show that the circuit can convert a 1.2 V low-voltage domain input signal with a frequency of 10 MHz into a high-voltage domain output voltage, and the output voltage range of a single WLDC can reach −10 V to 10 V. With a capacitive load within 5 pF, the transmission delay is less than 10 ns. The layout area is 594.88 µm2, which is suitable for a large-scale CIM array.

Funder

Fundamental Research Funds for the Central Universities

Key R&D Program of Jiangsu Province

Joint Project of Yangtze River Delta Community of Sci-Tech Innovation

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Methodology of Extraction DC Model for a 65 nm Floating-Gate Transistor;Intelligence of Things: Technologies and Applications;2023

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