Patterning of Silicon Substrate with Self-Assembled Monolayers Using Vertically Aligned Carbon Nanotube Electron Sources

Abstract

We introduce a novel patterning technique based on e-beam lithography using vertically aligned carbon nanotube (VACNT) emitters with self-assembled monolayers (SAMs). A 20 μm line width of silicon wafer patterning was successfully demonstrated using octadecyl trichlorosilane (OTS) as a photoresist. To investigate surface modification by the irradiated electrons from the emitters, both contact angle measurement and energy dispersive X-ray (EDX) analysis were conducted. The patterning mechanism of the electron beam irradiated on OTS-coated substrate by our cold cathode electron beam (C-beam) was demonstrated by the analyzed results. The effect of current density and exposure time on the OTS patterning was studied and optimized for the Si wafer patterning in terms of the electronic properties of the VACNTs. The authors expect the new technique to contribute to the diverse applications to microelectromechanical (MEMS) technologies owing to the advantages of facile operation and precise dose control capability based on field electron emission current from the VACNT emitter arrays.