Affiliation:
1. ECE Department Howard University Washington District of Columbia USA
2. Department of Electrical Engineering, Shiraz Branch Islamic Azad University Shiraz Iran
Abstract
SummaryA ripple carry adder (RCA) structure is presented which can concurrently correct a gain error in low‐resolution pipeline analog‐to‐digital converters (ADCs). The RCA is composed of a new swing‐boosted full adder (FA) based on the transmission gate (TG) technique. So, it is low‐power, high‐speed, and full‐swing with high driving capability. In 90 nm technology, the results of power, delay, and power‐delay‐product (PDP) of the FA are 1.5296 μW, 2.1141 ns, and 3.2337 fJ, respectively. The RCA with an area of 408.09 μm2 is evaluated by a 3‐bit pipeline ADC with 1.5‐bit per stage. When the erroneous codes are passed through the RCA, the maximum and minimum integral nonlinearity (INL) are improved by 19.83% and 90.98%, while the maximum and minimum of the differential nonlinearity (DNL) are improved by 50%, and 42.06%, respectively.