Embedded Silicon Fan-Out (eSiFO®) Technology for Wafer-Level System Integration
Author:
Affiliation:
1. Huatian Technology (Kunshan) Electronics Co., Ltd.; Economic & Technical Development Zone; Kunshan Jiangsu China
Publisher
John Wiley & Sons, Inc.
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1002/9781119313991.ch8/fullpdf
Reference11 articles.
1. Lau , J.H. Fan , N. Ming , L. 2016 Design, material, process, and equipment of embedded fan-out wafer/panel-level packaging Chip Scale Review 38 44
2. Yu D. 2015 Embedded silicon fan-out package and the method of forming the same
3. Development of package-on-package using embedded wafer-level package approach;Chong;IEEE Transactions on Components, Packaging and Manufacturing Technology,2013
4. Silicon wafer integrated fan-out technology;Huemoeller;Chip Scale Review,2015
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