Ultrathin 3D FO-WLP eWLB-PoP (Embedded Wafer-Level Ball Grid Array-Package-on-Package) Technology
Author:
Affiliation:
1. STATS ChipPAC; JCET Group
Publisher
John Wiley & Sons, Inc.
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1002/9781119313991.ch4/fullpdf
Reference8 articles.
1. Brunnbauer , M. Fürgut , E. Beer , G. Meyer , T. 2006 Embedded wafer level ball grid array (eWLB) Proceedings of 8th Electronic Packaging Technology Conference Singapore
2. Pitcher , G. 2009 Good things in small packages Newelectronics 18 19
3. Yoon , S.W. Caparas , J.A. Lin , Y. Marimuthu , P.C. 2012 Advanced low profile PoP solution with embedded wafer level MLP (eWLB-MLP) technology Proceedings of Electronic Component Technology Conference USA
4. Eslampour , H. Lee , S. Park , S. 2010 Comparison of advanced PoP package configurations Proceedings of ECTC 2010 Reno, NV
5. Chen , K. Chua , L. Choi , W.K. 2017 28nm CPI (chip/package interactions) in large size eWLB (embedded wafer level BGA) fan-out wafer level packages Proceedings of Electronic Component Technology Conference USA
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