Abstract
The output ripple of the Power Management IC (PMIC) is one of the causes of display panel noise. This paper introduces modeling and simulation methods aimed at predicting and mitigating noise induced by PMIC ripple. If the display panel simulation is performed using an ideal voltage source, the ripple characteristics of the PMIC cannot be included. The improved method accurately predicted the ripple of the voltage input to the panel by modeling flicker noise and thermal noise, which are the main causes of PMIC noise, and modeling the Z‐parameter and decoupling capacitor of the PCB. In addition, it was possible to minimize ripples and finally reduce display noise by optimizing the design of the power supply circuit.