A Fully Integrated System‐on‐Chip Design with Scalable Resistive Random‐Access Memory Tile Design for Analog in‐Memory Computing-Reference-Cited by-同舟云学术

A Fully Integrated System‐on‐Chip Design with Scalable Resistive Random‐Access Memory Tile Design for Analog in‐Memory Computing

Published:2022-05 Issue:8 Volume:4 Page:2200014
ISSN:2640-4567
Container-title:Advanced Intelligent Systems
language:en
Short-container-title:Advanced Intelligent Systems

Author:

Cai Fuxi¹^ORCID,Yen She-Hwa¹,Uppala Apurva¹,Thomas Luke¹,Liu Tianchi¹,Fu Peter¹,Zhang Xiaofeng¹,Low Ambrose¹,Kamalanathan Deepak²,Hsu Joe¹,Ayyagari-Sangamalli Buvna¹

Affiliation:

1. Corporate Strategy and Development: Design Technology Applied Materials Inc. 3325 Scott Blvd. Santa Clara CA 95054 USA

2. Semiconductor Products Group: Speciality Devices R&D Applied Materials Inc. 3325 Scott Blvd. Santa Clara CA 95054 USA

Publisher

Wiley

Subject

General Medicine

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/aisy.202200014

Reference44 articles.

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