A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators

Author:

Buchty Rainer1,Heuveline Vincent2,Karl Wolfgang1,Weiss Jan-Philipp

Affiliation:

1. Institute of Computer Science and Engineering; Karlsruhe Institute of Technology; Karlsruhe; Germany

2. Engineering Mathematics and Computing Lab, Institute for Applied and Numerical Mathematics; Karlsruhe Institute of Technology; Karlsruhe; Germany

Publisher

Wiley

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Computer Science Applications,Theoretical Computer Science,Software

Reference52 articles.

1. The free lunch is over - a fundamental turn toward concurrency in software;Sutter;Dr. Dobb's Journal,2005

2. Intel Corp Intel64 and IA-32 architectures software developer's manual http://www.intel.com/products/processor/manuals/

3. AMD Inc The AMD Fusion Family of APUs http://sites.amd.com/us/fusion/apu/Pages/fusion.aspx/

4. Synergistic processing in Cell's multicore architecture;Gschwind;IEEE Micro,2006

5. Khronos OpenCL working group OpenCL 1.0 Standard http://www.khronos.org/opencl/

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