31.4: A 3.4Gbps/lane Low Overhead Clock Embedded Intra-panel Interface for High Resolution and Large-Sized TFT-LCDs-Reference-Cited by-同舟云学术

31.4: A 3.4Gbps/lane Low Overhead Clock Embedded Intra-panel Interface for High Resolution and Large-Sized TFT-LCDs

Published:2013-06 Issue:1 Volume:44 Page:396-399
ISSN:0097-966X
Container-title:SID Symposium Digest of Technical Papers
language:en
Short-container-title:

Author:

Oh Woon-Taek,Kim Jin-Ho,Chang Young-Hwan,Kim Tea-Jin,Lee Jae-Youl,Nah Kyung-Suc,Hwang Gyoo-Cheol

Publisher

Wiley

Link

http://onlinelibrary.wiley.com/wol1/doi/10.1002/j.2168-0159.2013.tb06230.x/fullpdf

Reference10 articles.

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2. M. Park Y. Lee J. Lim B. Hong T. Kim H. Nam H. Song D. -K. Jeong W. Kim An Advanced Intra-Panel Interface (AiPi) with Clock Embedded MultiLevel Point-to-Point Differential Signaling for Large-Sized TFT-LCD Applications 1502 1505

3. H. -K. Jeon Y. -W. Moon J. -I. Seo J. -H. Na H. -S. Oh D. -K. Han P. -S. Kang Y. -S. Jeong M. -G. Park S. -C. O J. -C. Hong L. -S. Kim A Clock Embedded Differential Signaling (CEDSTM) for the Next Generation TFT-LCD Applications 976 978

4. A 2.0Gb/s Clock-Embedded Interface for Full-HD 10Bit 120Hz LCD Drivers With 1/5-Rate Noise-Tolerant Phase and Frequency Recovery;Yamaguchi;IEEE J. Solid-State Circuits,Dec. 2009

5. S. Ozawa H. Akita S. Suzuki H. Miura S. Hachiya T. Murakami K. Sasak M. Kato A 2Gbps/lane Source Synchronous Intra-Panel Interface for Large Size and High Refresh Rate Panel with Automatic Calibration 559 562

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