Affiliation:
1. Department of Materials Science and Engineering and Inter‐University Semiconductor Research Center Seoul National University Gwanak‐ro 1, Daehagdong, Gwanak‐gu Seoul 08826 Republic of Korea
2. School of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST) 291 Daehak‐ro, Yuseong‐gu Daejeon 34141 Republic of Korea
Abstract
AbstractProbabilistic computing can solve complex combinatorial optimization problems more efficiently than conventional deterministic computing. A probabilistic bit (p‐bit) with an n‐p‐n bistable resistor (biristor) is demonstrated for probabilistic computing. It is fabricated on an 8‐inch wafer with complementary metal–oxide–semiconductor (CMOS) compatible technologies. Its stochastic behavior of threshold switching, which is based on the phenomenon of a single transistor latch, provides output with a Boltzmann distribution. The p‐bit is composed of a biristor, a serial resistor, and a comparator. The output probability of the biristor‐based p‐bits shows a sigmoidal relationship with the input voltage, showing typical p‐bit characteristics. Invertible Boolean logic operations with p‐bits are demonstrated, and weighted maximum Boolean satisfiability problems are solved with high energy efficiency and accuracy. The biristor‐based p‐bits with perfect CMOS compatibility show sufficient device stability, demonstrating the possibility of large‐scale integration with a p‐bit array for complex optimization solvers.
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