P‐5.3: Design of Amorphous Silicon Thin‐Film Transistor Gate Driver Circuit with High Reliability and Narrow Border for Middle Size Liquid Crystal Display-Reference-Cited by-同舟云学术

P‐5.3: Design of Amorphous Silicon Thin‐Film Transistor Gate Driver Circuit with High Reliability and Narrow Border for Middle Size Liquid Crystal Display

Published:2019-09 Issue:S1 Volume:50 Page:732-734
ISSN:0097-966X
Container-title:SID Symposium Digest of Technical Papers
language:en
Short-container-title:SID Symposium Digest of Technical Papers

Author:

Ke Jhongciao¹²,Chung Techen²,Liao Chiate²,Yu Chiamin²,Qiao Yanbing²,Zou Zhongfei²,Guo Xiaojun¹

Affiliation:

1. National Engineering Lab for TFT-LCD Materials and Technologies, Department of Electronic EngineeringShanghai Jiao Tong University Shanghai 200240 China

2. InfoVision Optoelectronics (Kunshan) Co., Ltd. Kunshan 215301 China

Publisher

Wiley

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/sdtp.13626

Reference3 articles.

1. 9-1: An Ultra-narrow Border of In-cell Touch TFT-LCD by Using TGP and OTSD Technology with New S/R Circuit

2. 5-1: Invited Paper: Low Power and Narrow Border UHD LTPS Notebook Display

3. 28-1: A Robust Bidirectional Gate Driver on Array with Oxide TFTs

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