Highly reliable a‐Si:H gate driver on array with complementary double‐sided noise‐eliminating and dual voltage levels for TFT‐LCD applications

Author:

Zheng Guang‐Ting1ORCID,Liu Po‐Tsun1,Chen Jo‐Lin1ORCID,Li Cheng‐Hao1

Affiliation:

1. Department of Photonics and Institute of Electro‐Optical Engineering National Yang Ming Chiao Tung University Hsinchu Taiwan

Abstract

AbstractIn this work, we present a high‐reliability gate driver on array (GOA) for a 10.7‐in. HD (1,280 × RGB × 720) TFT‐LCD panel, featuring an alternatively double‐sided noise‐eliminating function. The gate driver circuit is designed with 12‐phase clock signals that exhibit 75% signal overlapping, threshold voltage recovering, and double‐sided driving schemes. The double‐sided driving scheme reduces the number of mental wires and TFTs in the gate driver circuit, resulting in a smaller layout area for GOA. By utilizing dual levels of voltage, we implemented a negative gate bias method to mitigate threshold voltage shifts for the noise‐eliminating and driving TFTs. This prevents the noises from clock signals effectively. The reliability test of the proposed GOA with 720 stages passed a strict testing condition (90°C and −40°C) for simulation and exhibited good performance over 800 hours at 90°C for measurement.

Funder

Ministry of Science and Technology, Taiwan

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

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