Utilizing Island Growth in Superlattice Buffers for the Realization of Thick GaN‐on‐Si(111) PIN‐Structures for Power Electronics

Abstract

In this study, the effect of implementing island growth in an AlN/Al0.1Ga0.9N superlattice on the structural properties of vertical GaN‐on‐Si(111) PIN‐structures is investigated. It is demonstrated by scanning electron microscopy (SEM) and atomic force microscopy (AFM) that islands are formed on‐top of V‐pits present in the AlN nucleation layer and that the island coalescence height can be controlled by the growth temperature. Defect selective etching analyses confirm a noteworthy reduction in the threading dislocation density (TDD), which diminishes from 1.2 × 109 cm−2 ± 7.5 × 107 cm−2 to 8.5 × 108 cm−2 ± 7.3 ×107 cm−2 as the island coalescence height increases from ≈160 nm to ≈450 nm, achieved by increasing the growth temperature. Cross‐sectional transmission electron microscopy (TEM) shows that island growth is particularly favorable for the reduction of a‐type dislocations. As a consequence of the significant reduction of a‐type dislocations in the buffer, stress relaxation during the GaN film growth is reduced, which is supported by in situ wafer curvature measurements and high‐resolution X‐ray diffraction (XRD). Owing to the optimized island growth conditions, thick and crack‐free GaN layers on Si(111) substrates are obtained with an absolute wafer bow of <50 μm.