Affiliation:
1. Department of Electrical Engineering IIT Bombay Powai Mumbai 400076 India
Abstract
We report high‐power InGaN back‐barrier AlGaN/GaN high electron mobility transistors with the gate placed closer to the source with an Au‐filled groove in the SiC substrate near the drain end. An InGaN back‐barrier is known to reduce short‐channel effects at high drain‐to‐source (VDS) voltage. However, the improvement is realized at the cost of reduced two‐dimensional electron gas density (ns) and saturation drain‐to‐source (IDS,SAT) current. Here, we demonstrate that both ns and IDS,SAT are recovered when the gate is appropriately delineated near the source. The junction temperature increases at higher VDS, which tends to deteriorate the power performance and suppress the benefits from higher IDS,SAT. This problem is contained by further thinning down the SiC substrate near the drain by creating a backside groove using deep reactive‐ion‐etching and filling it with Ti/Au. An enhanced thinned‐down substrate distributes the lateral electric field uniformly near the drain end, compounding its benefits with an asymmetric gate and lower junction temperature. The proposed device shows an output power of Pout = 6.7 W mm−1 at VDS = 28 V at 15 GHz for a 200 nm gate length (LG).
Subject
Materials Chemistry,Electrical and Electronic Engineering,Surfaces, Coatings and Films,Surfaces and Interfaces,Condensed Matter Physics,Electronic, Optical and Magnetic Materials