Microwave analysis of SiGe heterojunction double‐gate tunneling field‐effect transistor through its small‐signal equivalent circuit
Author:
Affiliation:
1. Department of Electronics EngineeringGachon University Gyeonggi‐do Korea
2. School of Electronics EngineeringKyungpook National University Daegu Korea
Funder
Korea Evaluation Institute of Industrial Technology
Publisher
Wiley
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1002/mmce.21678
Reference22 articles.
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3. IonescuAM PottV FritschiR et al. Modeling and design of a low‐voltage SOI suspended‐gate MOSFET (SG‐MOSFET) with a metal‐over‐gate architecture. In:Proceedings International Symposium on Quality Electronic Design(ISQED);2002; pp. 496‐501.
4. WongH‐P FrankDJ SolomonPMDevice design considerations for double‐gate ground‐plane and single‐gated ultra‐thin SOI MOSFET's at the 25 nm channel length generation. In: International Electron Devices Meeting (IEDM) 1998. San Francisco;1998; pp. 407‐410.
5. Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec
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2. Impact of temperature on RF characteristics and electrical noise analysis of an L‐shaped gate tunnel FET with hetero‐stacked source configuration;International Journal of RF and Microwave Computer-Aided Engineering;2020-06-08
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