An 8 GS/s 20 GHz bandwidth master-slave track-and-hold amplifier in 65 nm CMOS

Author:

Na Yunsik1,Mehmood Zubair1,Kang Sungbin1,Jung Heechang1,Seo Munkyo1ORCID

Affiliation:

1. Department of Electrical and Computer Engineering; Sungkyunkwan University; Suwon Republic of Korea

Funder

Ministry of Trade, Industry and Energy

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference11 articles.

1. A 32.5-GS/s sampler with time-interleaved track-and-hold amplifier in 65-nm CMOS;Ma;IEEE Trans MicrowTheory Tech,2014

2. Bouvier Y Konczykowska A Ouslimani A Godin J 2009 I.E. MTT-S International Microwave Symposium Digest

3. Design and analysis of CMOS high-speed high dynamic-range track-and-hold amplifiers;Liu;IEEE TransMicrow TheoryTechn,2015

4. A high-linearity, 30 GS/s track-and-hold amplifier and time interleaved sample-and-hold in an InP-on-CMOS process;Madsen;IEEE J Solid-State Circuits,2015

5. Tretter SG Fritsche D Carta C Ellinger F 20th International Conference on Microwaves, Radar and Wireless Communications (MIKON) 2014

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A low sampling clock, high bandwidth, master‐slave track and hold amplifier;International Journal of RF and Microwave Computer-Aided Engineering;2019-11-05

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