Author:
Elsayed Fahmi, ,Rashdan Mostafa,Salman Mohammad
Abstract
This paper presents a fully integrated CMOS Operational Floating Current Conveyor (OFCC) circuit. The proposed circuit is designed for instrumentation amplifier circuits. The CMOS OFCC circuit is designed and simulated using Cadence in TSMC 90 m technology kit. The circuit aims at two different design goals. The first goal is to design a low power consumption circuit (LBW design) while the second is to design a high bandwidth circuit (HBW design). The total power consumption of the LBW design is 1.26 mW with 30 MHz bandwidth while the power consumption of the HBW design is 3 mW with 104.6 MHz bandwidth.
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Instrumentation
Cited by
7 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 0.4 V 21.6 nW Duty Cycle Generator Based on Compact Pulsed Modulator for MEMs Sensing Interface;Lecture Notes on Data Engineering and Communications Technologies;2024
2. A 16B 5MS/s Pipeline-SAR ADC in 180nm CMOS;2023 IEEE 6th International Conference on Electronics and Communication Engineering (ICECE);2023-12-15
3. Failure Analysis of Abnormal Input Voltage in Error AMP Part of the PWM Controller;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20
4. High Vth Compensation Range AMOLED Pixel Circuit Based on A Dual Gate a-IGZO TFT and A Specially Amplified Capacitor;2023 6th International Conference on Electronics Technology (ICET);2023-05-12
5. High Linearity Wide Band Passive Mixer for Ku-Band Applications in a 180nm CMOS Technology;2022 7th International Conference on Integrated Circuits and Microsystems (ICICM);2022-10-28