A Fully Automated Environment for Verification of Virtual Prototypes-Reference-Cited by-同舟云学术

A Fully Automated Environment for Verification of Virtual Prototypes

Published:2006-05-18 Issue:1 Volume:2006 Page:
ISSN:1687-6180
Container-title:EURASIP Journal on Advances in Signal Processing
language:en
Short-container-title:EURASIP J. Adv. Signal Process.

Author:

Belanović P,Knerr B,Holzer M,Rupp M

Publisher

Springer Science and Business Media LLC

Link

http://link.springer.com/content/pdf/10.1155/ASP/2006/32408.pdf

Reference20 articles.

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2. Subramanian R: Shannon vs Moore: driving the evolution of signal processing platforms in wireless communications. Proc. IEEE Workshop on Signal Processing Systems (SIPS '02), October 2002, San Diego, Calif, USA 2-2.

3. International SEMATECH The International Technology Roadmap for Semiconductors, Austin, Tex, USA, 1999

4. Karsai G, Sztipanovits J, Ledeczi A, Bapty T: Model-integrated development of embedded software. Proc. IEEE 2003, 91(1):145-164. 10.1109/JPROC.2002.805824

5. Belanović P, Holzer M, Mičušík D, Rupp M: Design methodology of signal processing algorithms in wireless systems. Proc. International Conference on Computer, Communication and Control Technologies (CCCT '03), July–August 2003, Orlando, Fla, USA 288-291.

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