1. Chiou L-Y, Bhunia S, Roy K: Synthesis of application-specific highly-efficient multi-mode systems for low-power applications. Proceedings of Design, Automation and Test in Europe Conference and Exhibition (DATE '03), March 2003, Munich, Germany 96-101.
2. van der Werf A, Peek MJH, Aarts EHL, Van Meerbergen JL, Lippens PER, Verhaegh WFJ: Area optimization of multi-functional processing units. Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD '92), November 1992, Santa Clara, Calif, USA 292-299.
3. Vijay Kumar V, Lach J: Designing, scheduling, and allocating flexible arithmetic components. Proceedings of 13th International Conference on Field Programmable Logic and Applications (FPL '03), September 2003, Lisbon, Portugal 1166-1169.
4. Vijay Kumar V, Lach J: Heterogeneous redundancy for fault and defect tolerance with complexity independent area overhead. Proceedings of 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '03), November 2003, Boston, Mass, USA 571-578.
5. Chiricescu SMSA, Schuette MA, Glinton R, Schmit H: Morphable multipliers. Proceedings of 12th International Conference on Field Programmable Logic and Applications (FLP '02), September 2002, Montpellier, France 647-656.