Design and Analysis of a Radiation Resistant 12T SRAM Cell for Aerospace Applications

Abstract

Introduction: Advanced low-power designs have been scaled down to the device parameters that increase single-event multi-node upset in memory elements. This degradation of the stability of the memory elements in aerospace applications is due to the high radiation environment and rapid temperature changes. Method: Hence, this paper presents a comprehensive treatment model for hardened storage elements with a soft error resulting in multi-node upset. A novel 12T SRAM memory cell configuration has been proposed, analysed, and simulated using Cadence Virtuoso gpdk 45 nm CMOS technology. Result: The proposed design counteracts the positive feedback induced due to the charged ion strike, as in past technical literature. The radiation environment has been realized with double exponential current sources, and temperature analysis has been carried out under parametric analysis. Conclusion: The novel 12T achieves good stability and remains resilient to bit-flip due to ion strikes for a wider range of voltage when the temperature varies from -50oC to 200oC. Moreover, the proposed structure features a lower susceptibility to single event upset, less write and read time, and reduced area compared to the reported RSP 14T.