Fault tree synthesis from UML models for reliability analysis at early design stages

Author:

Lauer Christoph1,German Reinhard1,Pollmer Jens2

Affiliation:

1. University Erlangen-Nuremberg, Germany

2. Audi AG Ingolstadt, Germany

Abstract

System reliability analysis is often neglected at early design stages when design decisions change the system architecture rigorously. This is because appropriate methods are time consuming and require an in-depth knowledge about the applied method. We propose a modeling approach that focuses on reusability and automatic fault tree synthesis of the models. We use UML to model application dependent and application independent views on the system and allocate steps of the application definition to architecture elements. In doing so various different system concepts can be investigated with minimal re-modeling effort. We identify capturing fault propagation and fault containment information as a major challenge in automatic fault tree synthesis and offer an application dependent and an application independent approach to modeling this kind of information. Then we introduce an algorithm that transforms the UML model into a fault tree representation of the respective system and validate our approach using an example from the automotive domain. The results from the validation highlight the validity of the generated trees, the efficiency with which different system concepts may be evaluated, and the degree to which the analysis results can be generalized

Publisher

Association for Computing Machinery (ACM)

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