Author:
Kim Dae Hyun,Lim Sung Kyu
Cited by
11 articles.
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1. Low-Power Technique for 3D Interconnects;3D Interconnect Architectures for Heterogeneous Technologies;2022
2. High-Level Formulas for the 3D-Interconnect Power Consumption and Performance;3D Interconnect Architectures for Heterogeneous Technologies;2022
3. Photonic Interconnects for Interposer-based 2.5D/3D Integrated Systems on a Chip;Proceedings of the Second International Symposium on Memory Systems;2016-10-03
4. Revisiting 3DIC Benefit with Multiple Tiers;Proceedings of the 18th System Level Interconnect Prediction Workshop;2016-06-04
5. Buffered Interconnects in 3D IC Layout Design;Proceedings of the 18th System Level Interconnect Prediction Workshop;2016-06-04