Low-Latency Modulation Scheme for Solid State Drive

Author:

Berman Amit1

Affiliation:

1. Samsung, Israel

Publisher

ACM

Reference13 articles.

1. J. Im , "7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate," 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, San Francisco , CA, 2015 , pp. 1 - 3 . J. Im , "7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate," 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, San Francisco, CA, 2015, pp. 1-3.

2. 13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology

3. A 32-Gb MLC NAND Flash Memory With Vth Endurance Enhancing Schemes in 32 nm CMOS

4. Liu, Chun-Yi, " SOML Read : Rethinking the Read Operation Granularity of 3D NAND SSDs." Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems , 2019 .‏ Liu, Chun-Yi, "SOML Read: Rethinking the Read Operation Granularity of 3D NAND SSDs." Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019.‏

5. A. Berman , Y. Birk , "Constrained flash memory programming ", Proc. of IEEE ISIT , pp. 2128 - 2132 , Jul. 2011 . A. Berman, Y. Birk, "Constrained flash memory programming", Proc. of IEEE ISIT, pp. 2128-2132, Jul. 2011.

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