A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform-Reference-Cited by-同舟云学术

A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform

Published:2018-02-15 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
language:
Short-container-title:

Author:

Moss Duncan J.M¹,Krishnan Srivatsan²,Nurvitadhi Eriko²,Ratuszniak Piotr³,Johnson Chris²,Sim Jaewoong²,Mishra Asit²,Marr Debbie²,Subhaschandra Suchit²,Leong Philip H.W.¹

Affiliation:

1. University of Sydney, Sydney, Australia

2. Intel Corporation, Hillsboro, OR, USA

3. Intel Corporation & Koszalin University of Technology, Gdansk, Poland

Funder

Australian Research Councils Linkage Projects

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3174243.3174258

Reference29 articles.

1. An updated set of basic linear algebra subprograms (BLAS)

2. Firas Abuzaid Stefan Hadjis Ce Zhang and Christopher Ré. 2015. Caffe con Troll: Shallow Ideas to Speed Up Deep Learning. CoRR abs/1504.04343 (2015). http://arxiv.org/abs/1504.04343 Firas Abuzaid Stefan Hadjis Ce Zhang and Christopher Ré. 2015. Caffe con Troll: Shallow Ideas to Speed Up Deep Learning. CoRR abs/1504.04343 (2015). http://arxiv.org/abs/1504.04343

3. Utku Aydonat Shane O'Connell Davor Capalija Andrew C Ling and Gordon R Chiu. 2017. An OpenCL (TM) Deep Learning Accelerator on Arria 10. In ISFPGA. 10.1145/3020078.3021738 Utku Aydonat Shane O'Connell Davor Capalija Andrew C Ling and Gordon R Chiu. 2017. An OpenCL (TM) Deep Learning Accelerator on Arria 10. In ISFPGA. 10.1145/3020078.3021738

4. Sharan Chetlur Cliff Woolley Philippe Vandermersch Jonathan Cohen John Tran Bryan Catanzaro and Evan Shelhamer. 2014. cuDNN: Efficient Primitives for Deep Learning. CoRR abs/1410.0759 (2014). http://arxiv.org/abs/1410.0759 Sharan Chetlur Cliff Woolley Philippe Vandermersch Jonathan Cohen John Tran Bryan Catanzaro and Evan Shelhamer. 2014. cuDNN: Efficient Primitives for Deep Learning. CoRR abs/1410.0759 (2014). http://arxiv.org/abs/1410.0759

5. Young-kyu Choi Jason Cong Zhenman Fang Yuchen Hao Glenn Reinman and Peng Wei. 2016. A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. In DAC. 10.1145/2897937.2897972 Young-kyu Choi Jason Cong Zhenman Fang Yuchen Hao Glenn Reinman and Peng Wei. 2016. A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. In DAC. 10.1145/2897937.2897972

Cited by 51 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. GSCore: Efficient Radiance Field Rendering via Architectural Support for 3D Gaussian Splatting;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3;2024-04-27

2. Dynamic Multi-bit Parallel Computing Method Based on Reconfigurable Structure;Lecture Notes in Computer Science;2024

3. MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine;2023 International Conference on Field Programmable Technology (ICFPT);2023-12-12

4. Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers;Future Generation Computer Systems;2023-12

5. Accelerating a Meta Learning Model for Ultrasonic Non-Destructive Testing Applications Using Model Compression and FPGA Hardware;Journal of Signal Processing Systems;2023-11-11