SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy
Author:
Affiliation:
1. Technische Universität Dresden, Dresden, Germany
Funder
Deutsche Forschungsgemeinschaft
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3386263.3406907
Reference36 articles.
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2. Patrick Judd et al. "Stripes: Bit-serial deep neural network computing". In:Micro. 2016. Patrick Judd et al. "Stripes: Bit-serial deep neural network computing". In:Micro. 2016.
3. Salim Ullah et al. "SMApproxlib: library of FPGA-based approximate multipliers". In:DAC. 2018. Salim Ullah et al. "SMApproxlib: library of FPGA-based approximate multipliers". In:DAC. 2018.
4. Salim Ullah et al. "Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators". In:DAC. 2018. Salim Ullah et al. "Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators". In:DAC. 2018.
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