RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency

Author:

Ebrahimi Zahra1ORCID,Zaid Muhammad1,Wijtvliet Mark1ORCID,Kumar Akash1ORCID

Affiliation:

1. Department of Computer Science, Technische Universität Dresden, Dresden, Germany

Funder

German Research Foundation Deutsche Forschungsgemeinschaft (DFG) through the Project X-ReAp: Cross(X)-Layer Runtime Reconfigurable Approximate Architecture

European Social Fund (ESF) through the Project Re-Learning: Self-Learning and Flexible Electronics Through Inherent Component Reconfiguration

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Reference76 articles.

1. Design and analysis of a leading one Detectorbased approximate multiplier on FPGA;scarfone;Proc Int Conf Synth Model Anal Simulat Methods Appl Circuit Design (SMACD),2021

2. High-Throughput Multiplier Architectures Enabled by Intra-Unit Fast Forwarding

3. SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy

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