Fair CPU time accounting in CMP+SMT processors

Author:

Luque Carlos1,Moreto Miquel2,Cazorla Francisco J.3,Valero Mateo4

Affiliation:

1. Universistat Politècnica de Catalunya, and Barcelona Supercomputing Center, Barcelona, Spain

2. International Computer Science Institute, Universistat Politècnica de Catalunya, and Barcelona Supercomputing Center, Berkeley, CA

3. Barcelona Supercomputing Center, and Spanish National Research Council (IIIA-CSIC), Barcelona, Spain

4. Universistat Politècnica de Catalunya, and Barcelona Supercomputing Center), Barcelona, Spain

Abstract

Processor architectures combining several paradigms of Thread-Level Parallelism (TLP), such as CMP processors in which each core is SMT, are becoming more and more popular as a way to improve performance at a moderate cost. However, the complex interaction between running tasks in hardware shared resources in multi-TLP architectures introduces complexities when accounting CPU time (or CPU utilization) to tasks. The CPU utilization accounted to a task depends on both the time it runs in the processor and the amount of processor hardware resources it receives. Deploying systems with accurate CPU accounting mechanisms is necessary to increase fairness. Moreover, it will allow users to be fairly charged on a shared data center, facilitating server consolidation in future systems. In this article we analyze the accuracy and hardware cost of previous CPU accounting mechanisms for pure-CMP and pure-SMT processors and we show that they are not adequate for CMP+SMT processors. Consequently, we propose a new accounting mechanism for CMP+SMT processors which: (1) increases the accuracy of accounted CPU utilization; (2) provides much more stable results over a wide range of processor setups; and (3) does not require tracking all hardware shared resources, significantly reducing its implementation cost. In particular, previous proposals lead to inaccuracies between 21% and 79% when measuring CPU utilization in an 8-core 2-way SMT processor, while our proposal reduces this inaccuracy to less than 5.0%.

Funder

FPI

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

Reference36 articles.

1. Acosta C. Cazorla F. J. Ramirez A. and Valero M. 2009. The MPsim simulation tool. http://capinfo.e.ac.upc.edu/PDFs/dir21/file003472.pdf. Acosta C. Cazorla F. J. Ramirez A. and Valero M. 2009. The MPsim simulation tool. http://capinfo.e.ac.upc.edu/PDFs/dir21/file003472.pdf.

2. Broyles M. Francois C. Geissler A. Hollinger M. Rosedahl T. etal 2011. IBM energyscale for POWER7 processor-based systems. http://www.ibm.com/systems/power/hardware/whitepapers/energyscale7.html. Broyles M. Francois C. Geissler A. Hollinger M. Rosedahl T. et al. 2011. IBM energyscale for POWER7 processor-based systems. http://www.ibm.com/systems/power/hardware/whitepapers/energyscale7.html.

3. Architectural support for real-time task scheduling in SMT processors

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. GDP: Using Dataflow Properties to Accurately Estimate Interference-Free Performance at Runtime;2018 IEEE International Symposium on High Performance Computer Architecture (HPCA);2018-02

2. Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores;IEEE Transactions on Computers;2017-05-01

3. Sensible Energy Accounting with Abstract Metering for Multicore Systems;ACM Transactions on Architecture and Code Optimization;2016-01-07

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3