SAT-Lancer-Reference-Cited by-同舟云学术

SAT-Lancer

Published:2018-05-30 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 on Great Lakes Symposium on VLSI
language:
Short-container-title:

Author:

Ustaoglu Buse¹,Huhn Sebastian¹,Große Daniel¹,Drechsler Rolf¹

Affiliation:

1. University of Bremen & DFKI GmbH, Bremen, Germany

Funder

German Federal Ministry of Education and Research (BMBF)

German Research Foundation (DFG)

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3194554.3194643

Reference14 articles.

1. A. Biere A. Cimatti E. M. Clarke and Y. Zhu. 1999. Symbolic model checking without BDDs. In TACAS. 193--207. A. Biere A. Cimatti E. M. Clarke and Y. Zhu. 1999. Symbolic model checking without BDDs. In TACAS. 193--207.

2. John D. Davis Zhangxi Tan Fang Yu and Lintao Zhang. 2008. A Practical Reconfigurable Hardware Accelerator for Boolean Satisfiability Solvers DAC. 780--785. 10.1145/1391469.1391669 John D. Davis Zhangxi Tan Fang Yu and Lintao Zhang. 2008. A Practical Reconfigurable Hardware Accelerator for Boolean Satisfiability Solvers DAC. 780--785. 10.1145/1391469.1391669

3. A machine program for theorem-proving

4. A Computing Procedure for Quantification Theory

5. R. Drechsler M. Fr"anzle and R. Wille. 2015. Envisioning self-verification of electronic systems ReCoSoC. R. Drechsler M. Fr"anzle and R. Wille. 2015. Envisioning self-verification of electronic systems ReCoSoC.

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