Static Design of Spin Transfer Torques Magnetic Look Up Tables for ASIC Designs
Author:
Affiliation:
1. San Francisco State University, San Francisco, CA, USA
Funder
Defense Advanced Research Projects Agency
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3194554.3194651
Reference12 articles.
1. An energy efficient cache design using spin torque transfer (STT) RAM
2. Fabrication of a nonvolatile lookup-table circuit chip using magneto/semiconductor-hybrid structure for an immediate-power-up field programmable gate array;Suzuki D.;Symposium on VLSI Circuits,2009
3. Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit
4. Dynamic current mode logic (DyCML): a new low-power high-performance logic style
5. Design Optimization and Analysis of Multicontext STT-MTJ/CMOS Logic Circuits
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