Affiliation:
1. Arizona State University, Tempe, AZ
Abstract
We propose a fully differential, synthesizable zoom-ADC architecture with a passive loop filter for low-frequency Built-In Self-Test (BIST) applications, along with a synthesis tool that can target various design specifications. We present the detailed ADC architecture and a step-by-step process for designing the zoom-ADC. The design flow does not rely on the extensive knowledge of an experienced ADC designer. Two ADCs have been synthesized with different performance requirements in the 65nm CMOS process. The first ADC achieves a 90.4dB Signal-to-Noise Ratio (SNR) in 512μs measurement time and consumes 17μW power. The second design achieves a 78.2dB SNR in 31.25μs measurement time and consumes 63μW power.
Publisher
Association for Computing Machinery (ACM)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications
Reference53 articles.
1. On chip testing data converters using static parameters
2. G. W. Roberts F Taenzler and M. Burns. 2011. An Introduction to Mixed-Signal IC Test and Measurement. Oxford University Press. G. W. Roberts F Taenzler and M. Burns. 2011. An Introduction to Mixed-Signal IC Test and Measurement. Oxford University Press.
3. Built-in self-test and digital calibration of zero-if rf transceivers;Woong Jeong J.;IEEE Transactions on VLSI Systems,2016
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Hierarchical Fault Simulation for Mixed-Signal Circuits Using Template Based Fault Response Modeling;2024 IEEE European Test Symposium (ETS);2024-05-20
2. Zoom-In Feature for Storage-Based Logic Built-In Self-Test;2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2021-10-06
3. Storage-Based Built-In Self-Test for Gate-Exhaustive Faults;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-10
4. Storage-Based Logic Built-In Self-Test with Multicycle Tests;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021
5. Storage Based Built-In Test Pattern Generation Method for Close-to-Functional Broadside Tests;2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS);2020-07